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INTEGRATED CIRCUITS
DATA SHEET
UMA1021AM Low-voltage frequency synthesizer for radio telephones
Product specification Supersedes data of 1998 Mar 03 File under Integrated Circuits, IC17 1998 Nov 19
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
FEATURES * Low phase noise * Low current from 3 V supply * Fully programmable main divider * 3-line serial interface bus * Independent fully programmable reference divider, driven from external crystal oscillator * Hard and soft power-down control. APPLICATIONS * 900 MHz and 2 GHz mobile telephones * Portable battery-powered radio equipment. GENERAL DESCRIPTION The UMA1021AM BICMOS device integrates a prescaler, programmable dividers, and a phase comparator to implement a phase-locked loop. QUICK REFERENCE DATA SYMBOL VDD1, VDD2 VCC Itot Itot(pd) fRF fxtal fph(comp) Tamb PARAMETER digital supply voltage total supply current (IDD + ICC) total supply current in Power-down mode (IDD + ICC) RF input frequency crystal reference oscillator input frequency phase comparator frequency operating ambient temperature CONDITIONS VDD1 = VDD2 = VDD VCC = VDD = 5.5 V logic levels 0 V or VDD MIN. 2.7 2.7 - - 300 3 - -30
UMA1021AM
The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 3 V supplies. The synthesizer operates at RF input frequencies up to 2.2 GHz with a fully programmable reference divider. All divider ratios are supplied via a 3-wire serial programming bus. Separate power and ground pins are provided to the analog (charge pump) and digital circuits. The ground leads should be externally short-circuited to prevent large currents flowing across the die and thus causing damage. VDD1 and VDD2 must also be at the same potential (VDD). VCC must be equal to or greater than VDD for wider control range of the Voltage Controlled Oscillator (VCO), e.g. VDD = 3 V and VCC = 5 V. The charge pump current (phase detector gain) is fixed by an external resistor at pin ISET and controlled via the serial interface. Only a passive loop filter is necessary; the charge pump functions within a wide voltage compliance range to improve the overall system performance.
TYP. - - 10 5 - - 200 -
MAX. 5.5 5.5 - - 2200 35 - +85
UNIT V V mA A MHz MHz kHz C
analog supply voltage for charge pump VCC VDD
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME UMA1021AM SSOP16 DESCRIPTION plastic shrink small outline package; 16 leads; body width 4.4 mm VERSION SOT369-1
1998 Nov 19
2
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
BLOCK DIAGRAM
UMA1021AM
handbook, full pagewidth
LOCK CP VDD2
1 2 3
UMA1021AM
CHARGE PUMP BAND GAP 16 ISET
15 PHASE COMPARATOR 14
VCC GND(CP)
VSS3
4 5 MAIN DIVIDER WITH PRESCALER
RFI VSS2 PON 6
REFERENCE DIVIDER to charge pump
13 12 11
XTAL VDD1 E DATA CLK
7
SERIAL INTERFACE
10 9
VSS1
8
MGL406
Fig.1 Block diagram.
PINNING SYMBOL LOCK CP VDD2 VSS3 RFI VSS2 PON VSS1 CLK DATA E VDD1 XTAL GND(CP) VCC ISET PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DESCRIPTION out-of-lock detector output charge pump output digital supply voltage ground 3 (0 V) 2 GHz main divider input ground 2 (0 V) power-on input ground 1 (0 V) programming bus clock input programming bus data input programming bus enable input (active LOW) digital supply voltage crystal frequency input ground for charge pump analog supply voltage for charge pump charge pump current setting with external resistor from this pin to ground 3 Fig.2 Pin configuration.
handbook, halfpage
LOCK 1 CP 2 VDD2 3 VSS3 4 RFI 5 VSS2 6 PON 7 VSS1 8
MGL405
16 ISET 15 VCC 14 GND(CP) 13 XTAL
UMA1021AM
12 VDD1 11 E 10 DATA 9 CLK
1998 Nov 19
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
FUNCTIONAL DESCRIPTION Main divider The main divider is clocked at pin RFI by the RF signal which is AC-coupled from an external VCO. The divider operates with signal levels from 50 to 225 mV (RMS) and at frequencies from 300 MHz to 2.2 GHz. It consists of a fully programmable bipolar prescaler followed by a CMOS counter. The main divider allows programmable ratios from 512 to 131071 inclusive. Reference divider The reference divider is clocked by the signal at pin XTAL. The applied input signal should be AC-coupled. The circuit operates with levels from 50 up to 500 mV (RMS) and at frequencies from 3 to 35 MHz. Any divide ratios from 8 to 2047 inclusive can be programmed. Phase comparator and charge pump The phase detector is driven by the edges of the output signals of the main and reference dividers. The detector produces current pulses at pin CP. The pulse duration is equal to the difference in time of arrival of the edges from the two dividers. If the main divider edge arrives first, pin CP sinks current. If the reference divider edge arrives first, pin CP sources current. The current at pin CP can be controlled via the serial programming bus as a multiple of the reference current set by an external pull-down resistor connected between pin ISET and ground (see Table 2). Pin CP remains active except in the Power-down mode. Additional circuitry is included to ensure that the gain of the phase detector remains linear even for small phase errors. Out-of-lock detector The out-of-lock detector is enabled or disabled via the serial interface by setting bit OOL (dt12) HIGH or LOW (see Table 1). An open-drain transistor drives the output pin LOCK. It is recommended to keep the sink current in the LOW state below 400 A by applying a pull-up resistor from pin LOCK to the positive supply. When the out-of-lock detector is enabled pin LOCK is HIGH if the error at the phase detector input is less than approximately 25 ns, otherwise pin LOCK is LOW. If the out-of-lock detector is disabled, pin LOCK remains HIGH. Serial programming bus A simple 3-line unidirectional serial bus is used to program the circuit. 1998 Nov 19 4
UMA1021AM
The 3 lines are DATA (data bits), CLK (clock pulses) and E (enable signal). The data sent to the device is loaded in bursts framed by E. Programming clock edges and their appropriate data bits are ignored until E goes active LOW. The programmed information is loaded into the addressed latch when E returns HIGH. During normal operation, E should be kept HIGH. Only the last 21 bits serially clocked into the device are retained within the programming register. Additional leading bits are ignored, and no check is made on the number of clock pulses. The fully static CMOS design uses virtually no current when the programming bus is inactive. It can always capture new programmed data even during power-down. When the synthesizer is switched on, the presence of a signal at the reference divider input is required for correct programming. Data format The data format is shown in Table 1. The first bit entered is dt16, the last bit is ad0. The leading bits (dt16 to dt0) make up the data field. The four trailing bits (ad3 to ad0) are the address field. The UMA1021AM uses 4 of the 16 available addresses. These are chosen for compatibility with other Philips Semiconductors radio telephone ICs. The trailing address bits are decoded on the rising edge of E. This produces an internal load pulse to store the data in the addressed latch. To avoid erroneous divider ratios, the load pulse is not allowed during data reads by the frequency dividers. This condition is guaranteed by respecting a minimum E pulse width after data transfer. For the divider ratios, the first bits entered (PM16 and PR10) are the Most Significant Bits (MSBs). The test register (address 0000) does not normally need to be programmed. However, if it is programmed all bits in the data field should be set to logic 0. Power-down mode The synthesizer is switched on when both the power-on input (PON) and the programmed bit dt6 (sPON) are HIGH. When switched on, the dividers and phase detector are synchronized to avoid random phase errors. When switched off, the phase detector is synchronized to avoid interrupting of the charge pump pulses. The UMA1021AM has a very low current consumption in the Power-down mode.
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 1998 Nov 19 5 Philips Semiconductors Table 1 Bit allocation; note 1
Low-voltage frequency synthesizer for radio telephones
FIRST IN
REGISTER BIT ALLOCATION DATA FIELD ADDRESS dt6 sPON(5) dt5 dt4 dt3 dt2 dt1 X X X X X dt0 X PM0 PR0 ad3 0 X 0 0 0 ad2 0 0 1 1 ad1 0 0 0 0
LAST IN
dt16 X PM16(6) X Notes
dt15 dt14 dt13 X X X X X X
dt12 OOL(3) X
dt11 X X
dt10 CR1(4) PR10(7)
dt9 CR0
dt8 dt7 X
ad0 0 1 0 1
test bits; note 2 main divider coefficient reference divider coefficient
1. X = don't care. 2. The test register (address 0000) should not be programmed with any other values except all zeros for normal operation. 3. Bit OOL sets the Out-Of-Lock detector (1 = enabled). 4. Bits CR1 and CR0 set the charge pump current ratio (see Table 2). 5. Bit sPON sets the software power-up for the synthesizer (see Table 3). 6. PM16 is the MSB of the main divider coefficient. 7. PR10 is the MSB of the reference divider coefficient. Table 2 Charge pump current ratio; note 1 BIT CR0 0 1 0 1 CHARGE PUMP CURRENT 10 x Iset 18 x Iset 13 x Iset 17 x Iset Notes 1. Signal level a) L = LOW. b) X = don't care. c) H = HIGH. 2. X = don't care. Table 3 Power-on programming BIT sPON(2) X 0 1 SYNTHESIZER STATE off off on
BIT CR1 0 0 1 1 Note
PIN PON(1) L X H
V set 1. Reference current for charge pump: I set = ---------R set
UMA1021AM
Product specification
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD1, VDD2 VCC VCC-DD PARAMETER digital supply voltage analog supply voltage for charge pump supply voltage difference between the analog and digital supply voltages Vn voltage at pins 5, 7, 9, 10 and 11 at pins 1, 2, 13 and 16 VGND Ptot Tstg Tamb Tj(max) HANDLING All pins withstand the ESD class 2 test in accordance with "EIA/JESD22-A114-A". THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air difference in voltage between any of pins GND(CP), VSS1, VSS2 and VSS3 total power dissipation storage temperature operating ambient temperature maximum junction temperature these pins should be connected together -0.3 -0.3 -0.3 - -55 -30 - -0.3 CONDITIONS MIN. -0.3 -0.3
UMA1021AM
MAX. +5.5 +5.5 +5.5
UNIT V V V
VDD + 0.3 VCC + 0.3 +0.3 85 +125 +85 150
V V V mW C C C
VALUE 142
UNIT K/W
1998 Nov 19
6
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
UMA1021AM
CHARACTERISTICS All values refer to the typical test and application diagram of Fig.5; VDD1 = VDD2 = 2.7 to 5.5 V; VCC = 2.7 to 5.5 V; Tamb = 25 C; unless otherwise specified. Characteristics for which only a typical value is given are not tested. SYMBOL PARAMETER CONDITIONS MIN. - - 7 3 5 TYP. MAX. UNIT
Supplies; pins 3, 12 and 15 VDD1, VDD2 VCC IDD ICC Itot(pd) digital supply voltage analog supply voltage for charge pump total digital supply current of synthesizer (IDD1 + IDD2) analog supply current of charge pump total supply current in Power-down mode (IDD + ICC) RF input frequency input signal level (RMS value) main divider ratio input impedance (real part) input capacitance fRF = 1 GHz fRF = 2 GHz Ci fRF = 1 GHz fRF = 2 GHz Reference divider input; pin 13 fxtal Vxtal(rms) D/Dref Zi Ci fph(comp) floop(max) crystal reference oscillator input frequency sinusoidal input signal level (RMS value) reference divider ratio input impedance (real part) input capacitance fxtal = 13 MHz fxtal = 13 MHz 3 50 8 - - - - 10 1.3 - - 35 500 2047 - - - - k pF MHz mV AC-coupled; series resistance Rs = 50 VDD1 = VDD2 = VDD VCC VDD VDD = 5.5 V VCC = 5.5 V; Rset = 5.6 k 2.7 2.7 - - 5.5 5.5 9.5 3.8 50 V V mA mA A
logic levels 0 V or VDD -
RF main divider input; pin 5 fRF VRF(rms) D/Dm Zi 300 50 512 - - - - - - - 750 130 0.5 1.5 2200 225 131071 - - - - pF pF MHz mV
Phase comparator phase comparator frequency maximum loop comparison frequency 200 2000 kHz kHz
Charge pump current setting; pin 16 Rset Vset external resistor regulated voltage connected between pin 16 and ground Rset = 5.6 k 5.6 - - 1.2 12 - k V
1998 Nov 19
7
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
SYMBOL PARAMETER CONDITIONS MIN. - - 5 1 TYP.
UMA1021AM
MAX. VCC - 0.4 V +25 - +5
UNIT
Charge pump output; pin 2 Vo(compl) Io(err) Io(match) IL compliance output voltage output current error sink-to-source current matching leakage current Rset = 5.6 k Rset = 5.6 k Rset = 5.6 k Rset = 5.6 k; charge pump off; Vo(compl) = 12VCC fxtal = 13 MHz; Vxtal = 0 dBm; fph(comp) = 200 kHz fxtal = 13 MHz; Vxtal = 0 dBm; fph(comp) = 200 kHz 0.4 -25 - -5 % % nA
Phase noise N900 RF synthesizer's contribution to close-in phase noise of 900 MHz VCO signal inside the closed loop bandwidth RF synthesizer's contribution to close-in phase noise of 1.8 GHz VCO signal inside the closed loop bandwidth - -88 -
dBc/Hz
N1800
-
-82
-
dBc/Hz
Interface logic inputs; pins 7, 9, 10 and 11 VIH VIL Ii(bias) Ci VOL E(th) HIGH-level input voltage LOW-level input voltage input bias current input capacitance logic 1 or logic 0 0.7VDD -0.3 -5 - - - - - - 2 - 25 VDD + 0.3 V 0.3VDD +5 - V A pF
Out-of-lock detector output; pin 1 LOW-level output voltage threshold phase error open-drain output open-drain output 0.3VDD - V ns
1998 Nov 19
8
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
SERIAL BUS TIMING CHARACTERISTICS VDD1 = VDD2 = VCC = 3 V; Tamb = 25 C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS - - 100 MIN. TYP.
UMA1021AM
MAX.
UNIT
Serial programming clock; CLK tr tf Tcy tSTART tEND tW tSU;E tSU;DAT tHD;DAT Note 1. The minimum pulse width (tW) can be smaller than 4000 ns when the both conditions are fulfilled: 447 a) Main divider input frequency: f RF > --------tW 3 b) Reference divider input frequency: f xtal > ----tW rise time fall time clock cycle time 10 10 - - - - - - - 40 40 - - - - - - - ns ns ns
Enable programming; E delay to rising clock edge delay from last falling clock edge minimum inactive pulse width enable set-up time to next clock edge note 1 40 -20 4000 20 ns ns ns ns
Register serial input data; DATA input data to clock set-up time input data to clock hold time 20 20 ns ns
tSU;DAT handbook, full pagewidth
tHD;DAT
Tcy
tf
tr
tEND tSU;E
CLK
DATA
MSB
LSB
ADDRESS
E tSTART
MBG368
tW
Fig.3 Serial bus timing diagram.
1998 Nov 19
9
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
APPLICATION INFORMATION
UMA1021AM
handbook, full pagewidth
power amplifier
transmit data SPLITTER transmit mixer
PLL VCO LPF
MAIN DIVIDER duplex filter TCXO
REFERENCE DIVIDER
PHASE COMPARATOR AND CHARGE PUMP
UMA1021AM
low noise amplifier to demodulation 1st mixer 2nd mixer
MGL407
Fig.4 Typical application block diagram.
1998 Nov 19
10
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
UMA1021AM
handbook, full pagewidth
positive supply LOCK 1 16 ISET 5.6 k 12 12
positive supply
12
12 100 nF 4.7 F control RF VCO out
(1)
CP
(1) (1) (1)
2
15
VCC 100 nF GND(CP) 100 nF
(1)
12 VDD2 100 nF VSS3 3 14
4
13
XTAL
1 nF
1 nF 18 18 56 pF
18
56 pF
UMA1021AM
RFI 5 12 VDD1
VCC VTCXO GND Vcontrol fosc
100 nF 56 VSS2 6 11 E
positive supply to 1st mixer 1 k VSS1 CLK 12 12 12
MGL408
PON
7
10 DATA
8
9
3-wire bus
(1) Values depend on application.
Fig.5 Typical test and application diagram.
1998 Nov 19
11
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
PACKAGE OUTLINE SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm
UMA1021AM
SOT369-1
D
E
A X
c y HE vM A
Z
16
9
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0.00 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.25 0.13 D (1) 5.30 5.10 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT369-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 94-04-20 95-02-04
1998 Nov 19
12
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
UMA1021AM
If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Nov 19
13
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
UMA1021AM
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Nov 19
14
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
NOTES
UMA1021AM
1998 Nov 19
15
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
435102/750/02/pp16
Date of release: 1998 Nov 19
Document order number:
9397 750 04261

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